@InProceedings{ONeillCoulson98, title = "{A} {D}istributed {P}arallel {P}rocessing {S}ystem for the {S}trong{ARM} {M}icroprocessor", author= "O'Neill, Brian C. and Coulson, G. C. and Wong, Adam K. L. and Hotchkiss, R. and Ng, J. H. and Clark, S. and Thomas, P. D. and Cawley, A.", editor= "Welch, Peter H. and Bakkers, Andr\`{e} W. P.", pages = "39--48", booktitle= "{P}roceedings of {W}o{TUG}-21: {A}rchitectures, {L}anguages and {P}atterns for {P}arallel and {D}istributed {A}pplications", isbn= "90 5199 391 9", year= "1998", month= "mar", abstract= "Recent developments in hardware message routing devices have demonstrated significant performance benefits for parallel processing networks. This work describes a system which uses a single chip interface between the high performance StrongARM processor and the existing ICR C416 message routing chip. The ICR C416 is a non-blocking communications routing device. Each device allows concurrent communications with up to 16 processors. A distributed parallel processing system can be constructed using the StrongARM and ICRC416 devices, with features similar to that of a transputer system but with the benefits of the higher clock speed and cache memory of the StrongARM processor." }