Newsgroups: comp.parallel.mpi From: Cho-Li Wang Subject: HPCA-4 Advance Program (long) Organization: HKU Date: Wed, 03 Dec 1997 18:08:15 +0800 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-ID: <34852F8F.33C1@cs.hku.hk> ********************************************************** Fourth International Symposium On High-Performance Computer Architecture (HPCA-4) Advance Program *********************************************************** January 31 - February 4, 1998 Orlean's Hotel, Las Vegas, USA http://www.cs.hku.hk/~hpca4/ ----------------------------------------------------------- GENERAL CHAIR: Kai Hwang, University of Hong Kong and University of Southern California PROGRAM CHAIR: Jean-Loup Baer, University of Washington ******************************** CONFERENCE and WORKSHOP SCHEDULE ******************************** January 31 (Saturday) 8:00 am - 5:00 pm Workshop 1: Fourth Annual Workshop on Computer Architecture Education (WCAE-4) Organizer: Prof. David Kaeli (Northeastern University) January 31 (Saturday) 12:00 pm - 5:00 pm Workshop 2: Multi-Threaded Execution, Architecture and Compilation (MTEAC 98) Organizers: W. Najjar and W. Bohm (Colorado State University) January 31 (Saturday) 12:00 pm - 5:00 pm Workshop 3: Communication, Architecture, and Applications for Network-based Parallel Computing (CANPC '98) Organizers: Dhabaleswar K. Panda (Ohio State University) and Craig B. Stunkel (IBM T. J. Watson) February 1 (Sunday) 8:00 am - 5:00 pm Workshop 4: First Workshop on Computer Architecture Evaluation using Commercial Workloads Organizers : Russell Clapp (Intel Corporation), Ashwini Nanda (IBM T. J. Watson Research Center), and Josep Torrellas (University of Illinois at Urbana-Champaign) February 1 (Sunday) 8:00 am - 5:00 pm Workshop 2 and 3 Continuation FEBRURARY 2 (MONDAY) 9:00 am - 9:10 am Opening Remarks 9:10 am - 10:30 am Keynote Speech # 1 Phil Bernstein (Microsoft) 10:30 am - 11:00 am -- Coffee Break 11:00 am - 12:30 pm Session IA : Multithreading Chair: Josep Torrellas (University of Illinois) The potential for using thread-level data speculation to facilitate automatic parallelization J.Gregory Steffan and Todd Mowry (Carnegie-Mellon University) Control Speculation in Multithreaded Processors through Dynamic Loop Detection Jordi Tubella and Antonio Gonzalez (University of Catalunya, Spain) Performance study of a Concurrent Multithreaded Processor Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, and Pen-Chung Yew (University of Illinois and University of Minnesota) 11:00 am - 12:30 pm Session IB: Routing and Communication Mechanisms Chair: Dhabaleswar Panda (Ohio State University) The sensitivity of communication mechanisms to bandwidth and latency Frederic Chong, Rajeev Barua, Fredrik Dahlgren, John Kubiatowicz and Anant Agarwal (University of California at Davis, MIT, and Chalmers University, Sweden) Credit-Flow-Controlled ATM for MP Interconnection: the ATLAS I Single-Chip ATM Switch Manolis Katevenis, Dimitrios Serpanos and Emmanuel Spyridakis (FORTH and University of Crete, Greece) A Very Efficient Distributed Deadlock Detection Mechanism for Wormhole Networks P. Lopez, J.M. Martinez and J. Duato (Universidad Politecnica de Valencia, Spain) 12:30 pm - 2:00 pm -- Lunch Break 2:00 pm - 3:30 pm -- Session IIA. Communication Impact on Application Performance Chair: Lawrence Rauchwerger (Texas A&M) Challenging applications on fast networks Koen Langendoen, Rutger Hofman and Henri Bal (Vrije Universiteit, The Netherlands) Architectural implications of a family of irregular applications Dave O'Hallaron, Jonathan Shewchuk, and Thomas Gross (Carnegie-Mellon University) The Architectural Costs of Streaming I/O: A Comparison of worksations clusters and SMPs Remzi H. Arpaci-Dusseau, Andrea C. Arpaci-Dusseau, David E. Culler, Joseph M. Hellerstein, and David A. Patterson (University of California Berkeley) 2:00 pm - 3:30 pm -- Session IIB. SMP Clusters Chair: Todd Mowry (Carnegie-Mellon University) The Effectiveness of SRAM Network caches in Clustered DSM's Adrian Moga and Michel Dubois (University of Southern California) Home-based SVM protocols for SMP clusters: Design, Simulations, Implementation and Performance Rudrajit Samanta, Angelos Bilas, Liviu Iftode, and Jaswinder Pal Singh (Princeton University) Fine-grain Software Distributed Shared memory on SMP clusters Daniel Scales, Kourosh Gharachorloo and Anshu Aggarwal (DEC Western Research Laboratory) 3:30 pm - 4:00 pm -- Coffee Break 4:00 pm - 5:30 pm -- Panel Session The emergence of workstation clusters: Should we continue to build MPPs? Moderator: Dhabaleswar Panda (Ohio State University) Panelists: Andrew Chien (University of Illinois), Alan Cox (Rice University), David Greenberg (Sandia National Lab.) Bob Horst (Tandem Computers), Steve Scott (Cray), J. P. Singh (Princeton University), Craig Stunkel (IBM T.J. Watson Research Center) 6:30 pm - 9:00 pm -- Conference Reception February 3 (Tuesday) 9:00 am - 10:00 am -- Keynote Speech # 2 Bill Dally (Stanford University) 10:00 am - 10:30 am -- Coffee Break 10:30 am - 12:00 pm -- Session IIIA. Shared-Memory Multiprocessors Chair: Pen Yew (University of Minnesota) PRISM: An Integrated Architecture for Scalable Shared Memory Kattamuri Ekanadham, Beng-Hong Lim, Pratap Pattnaik, and Marc Snir (IBM T. J. Watson Research Center) Enhancing Memory Use in Simple Coma: Multiplexed Simple Coma Sujoy Basu and Josep Torrellas (University of Illinois) Hardware for Speculative Run-Time Parallelization in Distributed Shared-Memory Multiprocessors Ye Zhang, Lawrence Rauchwerger, and Josep Torrellas (University of Illinois and Texas A&M University) 10:30 am - 12:00 pm -- Session IIIB. Speculation and Register Renaming Chair: Manolis Katevenis (FORTH, Greece) Virtual-Physical Registers Antonio Gonzalez, Jose Gonzalez, and Mateo Valero (University of Catalunya, Spain) Supporting highly-speculative execution via adaptive branch trees Tien-Fu Chen (National Chung Cheng University, Taiwan) Speculative Versioning Cache Sridhar Gopal, T. N. Vijaykumar, James E. Smith, and Gurindar S. Sohi (University of Wisconsin-Madison) 12:00 pm - 2:00 pm -- Conference Luncheon 2:00 pm - 3:30 pm -- Session IVA. Network Interface Design Chair: Steve Scott (Cray) The Impact of Data Transfer and Buffering Alternatives on Network Interface Design Shubhendu S. Mukherjee and Mark D. Hill (University of Wisconsin-Madison) Address Translation Mechanisms In Network Interfaces Ioannis Schoinas and Mark D. Hill (University of Wisconsin-Madison) Exploiting Two-Case Delivery for Fast Protected Messaging Kenneth Mackenzie, John Kubiatowicz, Matthew Frank, Walter Lee, Victor Lee, Anant Agarwal and M. Frans Kaashoek (MIT) 2:00 pm - 4:00 pm -- Session IVB. Compiler and Operating System Issues Chair: Alan Cox (Rice University) Temporal-based procedure reordering for improved instruction cache performance John Kalamatianos and David Kaeli (Northeastern University) Performance evaluation of tiling for the register level M. Jimenez, J. Llaberia and A. Fernandez (University of Catalunya, Spain) Treegion Scheduling for Wide Issue Processors William A. Havanki, Sanjeev Banerjia, and Thomas M. Conte (North Carolina State University) Communication Across Fault-Containment Firewalls on the SGI Origin Kaushik Ghosh and Allan Christie (Silicon Graphics) 4:00 pm - 4:30 pm -- Coffee Break 4:30 pm - 5:30 pm -- TCCA Meeting February 4 (Wednesday) 9:00 am - 10:00 am -- Keynote Speech # 3 Steve Wallach (Centerpoint Venture Partners) 10:00 am - 10:30 am -- Coffee Break 10:30 am - 12:00 pm -- Session VA. Enhancements for DSM systems Chair: J. P. Singh (Princeton University) Efficiently Adapting to Sharing Patterns Luis Rodolpho Monnerat and Ricardo Bianchini (University of Rio de Janeiro and Petrobras, Brazil) Comparative Evaluation of Latency Tolerance Techniques for Software Distributed Shared Memory Todd C. Mowry, Charles Chan, and Adley Lo (University of Toronto and Carnegie-Mellon University) Using multicast and multithreading to reduce communication in software DSM systems Evan Speight and John Bennett (Rice University) 10:30 am - 12:00 pm -- Session VB. Processor Design and Performance Evaluation Chair: Pradeep Dubey (IBM T. J. Watson) FPGA based custom computing machines for irregular problems David Abramson, Paul Logothetis, Adam Postula and Marcus Randall (Monash University, University of Queensland, and Griffith University, Australia) Non-Stalling Counter Flow Architecture Mike Miller, Ken Janik and Shih-Lien Lu (Oregon State University) Partial sampling with reverse state reconstruction: A new technique for branch predictor performance estimation Darren Vengroff and Guang Gao (University of Delaware) ------------------------------------------------------ HOTEL RESERVATION Please make your reservations directly with Orlean's Hotel before January 15, 1998. The conference rate for Friday and Saturday (both nights together) arrival is $89/night and for Sun-Tue is $69/night. The Orleans' hotel may extend the deadline after January 15, 1998 based on room availability. HOTEL ADDRESS: Orlean's Hotel 4500 W. Tropicana Ave. Las Vegas, NV 89103 (800) 675-3267 HOTEL INFORMATION Making its Las Vegas debut in Winter '96/'97, the lavish 21-story, 840-room resort is the newest property to be built by Coast Resorts, Inc. developers of two existing Las Vegas landmarks, the Gold Coast and the Barbary Coast. It's easy to find and easy to reach. The Orlenas, conveniently located on Tropicana just west of the Strip & I-15. A complimentary shuttle bus will travel back and forth to the Las Vegas Strip and The Orlenas' sister hotel, the Gold Coast, just west of the Strip. CONFERENCE REGISTRATION: To register, please use the registration form and other information from the site: http://www.ee.iastate.edu/~prasant/hpca. Alternatively, you may send your name, organization, address, telephone number, (fax and email, if appropriate) along with your check for the appropriate amount (drawn on a US Bank, only) or credit card information (along with your signature) to the Registration Chair: Dr. Prasant Mohapatra, Department of Electrical and Computer Engineering, Iowa State University, Ames, IA50011, USA, Tel: (515) 294-3959, Fax: (515) 294-8432, e-mail: prasant@iastate.edu. REGISTRATION FEE Symposium Workshop 1 or 4 Workshop 2 or 3 Advance* On-site Advance* On-site Advance* On-site ---------------------------------------------------------------- IEEE Members $325 $390 $60 $70 $90 $110 Non-members $410 $450 $75 $85 $110 $135 Student $200 $225 $40 $50 $60 $70 ---------------------------------------------------------------- *Advance registration at lower rate is accepted until January 15, 1998. ********************* STUDENT TRAVEL GRANTS ********************* A limited number of student travel grants to HPCA-4 will be made available by IEEE CS TCCA (Technical Committee on Computer Architecture). Students that wish to submit travel grant requests should do so before Dec 15, 1997. The grants will cover only (a portion) of the round-trip air fare. Notification of the awards will be on or before Dec 20, 1997. The following information should be included: Student name: ________________________ Institution: __________________________ Address: ____________________________ e-mail: ______________________________ Name of advisor: ______________________ Involvement with HPCA-4 : ______________ *** e.g., presentation of a paper to HPCA-4 and/or to accompanying workshops, co-author of a paper being presented, referee etc. Estimated travel expenses: _________________ Please submit requests, preferably by e-mail, to: Jean-Loup Baer Department of Computer Science and Engineering University of Washington Box 352350 Seattle, Wa, 98195-2350 e-mail: baer@cs.washington.edu For registration and other information, please visit : http://www.ee.iastate.edu/~prasant/hpca ------------------------------------------------------------- PROGRAM COMMITTEE Santosh Abraham (Hewlett-Packard) Sarita Adve (Rice) Tom Anderson (Berkeley) Jean-Loup Baer (Washington) Peter Chen (Michigan) Fredrik Dahlgren (Chalmers) Pradeep Dubey (IBM) Dirk Grunwald (Colorado) Corinna Lee (Toronto) Kunle Olukotun (Stanford) Dhabaleswar Panda (Ohio State) Kishore Ramachandran (Georgia Tech) Steven Scott (Cray) John Shen (CMU) Jim Smith (Wisconsin) Josep Torrellas (Illinois) Anand Tripathi (NSF) Wen-Hann Wang (Intel - Hillsboro) Tse-Yu Yeh (Intel - Santa Clara) Pen-Chung Yew (Minnesota) Xiaodong Zhang (Colledge of William and Mary) ORGANIZING COMMITTEE: Publications Chair: Jason Ding (Intel Corporation) Local Arrangement Chair: Shahram Latifi (Univ. of Nevada at Las Vegas) Finance/Registration Chair: Prasant Mohapatra (Iowa State Univ.) Tutorial/Workshop Chair: Josep Torrellas (Univ. of Illinois) Publicity Chair: Cho-Li Wang (Univ. of Hong Kong)