From: Victor Eijkhout <eijkhout@nala.cs.utk.edu>
Newsgroups: comp.parallel.mpi
Subject: Re: Celeron vs Pentium II
Date: 08 Mar 1999 16:08:56 -0500
Organization: University of Tennessee
Message-Id: <om1ziz1yfr.fsf@nala.cs.utk.edu>
References: <MqYD2.1842$_n2.52541@carnaval.risq.qc.ca>
    <19990306115330.11135.00003808@ng-cb1.aol.com>
    <slrn7e316g.mrk.adisaacs@pirx.resnet.mtu.edu>
Xref: ukc comp.parallel.mpi:4714


adisaacs@mtu.edu (Andy Isaacson) writes:

> The L2 cache in the Celeron is clocked at core speed (333 MHz in this

What do you mean by the clock speed of a cache? I know of speed of
processors and of busses, but not of cache.

Oh, and how does your 333 gell with other people claiming 66 or 100?
If there is a low number somewhere in your system, then the higher
ones are pretty much irrelevant.

Unless you're writing advertising copy :-) :-)

-- 
Victor Eijkhout
`In Papua New Guinea, he said, he cancelled There's a Girl in My Soup,
 "because I thought it might give them ideas".'
                    [traveling comedian Derek Nimmo, Times 1999/02/25]

