Newsgroups: comp.sys.transputer From: Franz Korntner Subject: Undocumented transputer behaviour Organization: XS4ALL, networking for the masses Date: Thu, 03 Jul 1997 23:50:11 +0100 Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-ID: <33BC2CA3.225DC854@xs4all.nl> Although I have found no reference concerning the following in the Inmos documentation, does anyone know how a transputer (in my case a T800) responds to an illegal instruction or an illegal memory reference. I define an illegal instruction as performing the OPR or fpentry instruction with an undocumented value in Areg. An illegal memory reference can occur when dereferencing a NULL pointer, i.e. reading address 0x00000000. When a T800 is booted via a link, it is stated that Areg contains the previous Iptr and Breg contains the previous Wdesc. But what are the previous values after a powerup? When performing internal communication, the address of the data-area is stored in Wptr-3 by the first process. The second process determines the length for both sides of the communication. Now when performing external communication, is it true that the address and length of the data-area (eg. Creg and Areg of in/out) are stored in internal (unaccessable) chip registers, thus requiring a total of 16 internal registers? Is Wptr-3 used during external communication (as Inmos says: 'to aid analysing'). Is the event channel used to trigger the assertion of the Event signal line? ie. when issuing an IN instruction on port MinInt+8, will the process be reactivated only when such an assertion occurs. What happens when an IN is performed when the assertion has already occured. Thanx.