Using Transputers to Simulate Optoelectronic Computers
Authors: Cramb, I., Upstill, C.
In this paper we present the results of our simulation and study of an optoelectronic SIMD architecture on a medium sized transputer array (18 processors). The particular optoelectronic architecture we have simulated is a Binary Image Algebra (BIA) Processor of considerable computational power -processing data at rates well in excess of those currently achievable using electronic computers. Considering the inherent parallelism of such an architecture, along with the need for very large amounts of data processing in order to perform realistic simulation, the simulator was implemented in occam on a transputer array. The process model of computing adopted by occam is also most appropriate to the optoelectronic architecture which we have designed because of its modularity: we have been able to design process structures which have the same topology as the processing modules in our architecture. In the optoelectronic architecture, data are transmitted to a set of processing modules, one of which is chosen to perform a particular operation; the data pass through that module and are are transformed as they do so; in our simulator the processing takes place in a very similar way: data are transmitted from the controller to the farm; a particular process/module of code is called, and the data are passed through it, using occam channels, and are processed as they do so.We begin with a description of BIA itself. The core of the paper is a description of the logical architecture we have adopted; we include an account of a method for reducing the limiting effect of the transputer link bandwidth on the performance of farming computationally undemanding tasks. The paper is concluded with a brief description of our design for an optoelectronic SIMD architecture.
OUG-12: Tools and Techniques for Transputer Applications, Stephen J. Turner, 1990, pp 50 - 59 published by IOS Press, Amsterdam
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