Annual Conference: Communicating Process Architectures
Communicating Process Architectures 2018,
the 40th. WoTUG conference on concurrent and parallel systems, takes place from
Sunday August 19th. to Wednesday August 22nd. 2018 and is hosted by
Professor Dr. Rainer Spallek,
VLSI Design, Diagnostics and Architecture
at the Faculty of Computer Science,
Technische Universität Dresden, Germany.
The conference is organised by Dr. Spallek in collboration with Oliver Knodel and Uwe Mielke
and in partnership with WoTUG.
WoTUG provides a forum for the discussion and promotion of concurrency ideas,
tools and products in computer science.
It organises specialist workshops and annual conferences that address
key concurrency issues at all levels of software and hardware granularity.
WoTUG aims to progress the leading state of the art in:
and to stimulate discussion and ideas on the roles concurrency will play in the future:
theory (programming models, process algebra, semantics, ...);
practice (multicore processors and run-times, clusters, clouds, libraries, languages, verification, model checking, ...);
education (at school, undergraduate and postgraduate levels, ...);
applications (complex systems, modelling, supercomputing, embedded systems, robotics, games, e-commerce, ...);
Of course, neither of the above sets of bullets are exclusive.
for the next generation of scalable computer infrastructure (hard and soft) and application,
where scaling means the ability to ramp up functionality (stay in control as complexity increases)
as well as physical metrics (such as absolute performance and response times);
for system integrity (dependability, security, safety, liveness, ...);
for making things simple.
A database of papers and presentations from WoTUG conferences is here.
The Abstract below has been randomly selected from this database.
An A/D D/A board using IEEE-1355 DS-Links for Heterogeneous Multiprocessor Environment
In our approach for developing heterogeneous control systems, we have developed a real-time A/D D/A board called "the Raptor". The Raptor communicates over high-speed and highly-reliable DS-links (IEEE-1355). To obtain highly accurate analogue conversions, the A/D and D/A converteds have a 12-bit resolution. We measured a maximum sampling frequency of 90.5kHz on each A/D channel. The maximum sampling frequency of each D/A channel has been measured to be approximately 145kHz. For communication with the rest of the control environment, two 100Mbit/s DS-links are available. A data transfer rate of 5.57Mbytes/s has been achieved on each DS-link adapter. The Raptor forms a part of a heterogeneous multiprocessor closed-loop control environment. This new environment can be used, amongst others, for controlling heavy robot applications. The work on this environment takes place in scope of JavaPP (Java Plug and Play) project. The software will be developed together with the CJT-library that provides inherent object-orientated and parallel design patterns, according to CSP paradigm, in Java.