Paper Details

@InProceedings{ONeillMoore03,
  title = "{A} {S}ingle {C}hip {S}olution for {D}istributed {P}rocessing {S}ystems",
  author= "O'Neill, Brian C. and Moore, P.W. and Clark, S.",
  editor= "Broenink, Jan F. and Hilderink, Gerald H.",
  pages = "83--90",
  booktitle= "{C}ommunicating {P}rocess {A}rchitectures 2003",
  isbn= "1 58603 381 6",
  year= "2003",
  month= "sep",
  abstract= "This paper describes a processor and an inter-processor
     communications interfaceintegrated on a single chip for use
     in a distributed processing system. The system isbased on
     work of the electronic systems design and parallel
     processing group at theNottingham Trent University. The four
     main elements of the chip design areprocessor, memory,
     communication interface and packet routing switch all
     integratedunto one chip. This design is achieved by the use
     of the ALTERA ARM basedExcalibur system on a programmable
     chip (SOPC) containing an embedded processorand programmable
     logic. The paper describes the communication features
     andimplementation carried out by the research group to
     achieve this single chip processor."
}

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