Crisis in High Performance Computing - Call for attendance

11th September 1995

Lecture room G22 (also known as the Pearson Lecture Theatre)
Pearson Building
University College London
Gower Street
London WC1E 6BT

Background

State-of-the-art high performance computers are turning in what some observers consider woefully low performance figures for many user applications. How widespread are such feelings, how justified are they and, if they prove to be justified, what implications do they hold for the future of High Performance Computing (HPC)?

Efficiency levels for ``real'' HPC applications are reported (e.g. by the NAS parallel benchmarks) ranging around 20-30% (for some 16-node systems) to 10-20% (for 1024-node massively parallel super-computers). Are low efficiencies the result of bad engineering at the application level (which can be remedied by education) or bad engineering at the architecture level (which can be remedied by <what>)? Maybe these efficiency levels are acceptable to users ... after all, 20% of 16 nodes (rated at 160 MFLOPS per node) is still around 500 Mflops and 10% of 1024 nodes is 16 Gflops? But they may be disappointing to those who thought they were going to be able to turn round jobs at over 100 Gflops! Are there other ways of obtaining the current levels of performance that are more cost-effective?

A further cause of concern is the dwindling number of suppliers of HPC technology that are still in the market ...

This workshop will focus on the technical and educational problems that underly this growing crisis. Political matters will not be considered ... unless they can be shown to have a direct bearing.

Participants

potential users of HPC facilities (``what problems am I going to face ...will it be worth my while?'');
current users of HPC facilities (``what performance am I getting ...how hard has it been to achieve this ...am I getting value for the time I have invested?'');
non-users of HPC facilities (``what effect has the funding of large scale super-computers had on my ability to obtain smaller scale facilities locally - preferably on my desk?'');
architects of HPC facilities (``how can decent efficiency levels be achieved and how can application design-implementation-tune- test-and-maintain be made simple?'').

Organisers

The London and South-East consortium for education and training in High-Performance Computing (SEL-HPC). SEL-HPC comprises ULCC, QMW (and the other London Parallel Application Centre colleges - UCL, Imperial College and the City University), the University of Greenwich and the University of Kent.