- ST C101 (rev 4) Parallel DS-Link Adaptor Datasheet -
Engineering Data
Last modified 16:55:00, 18 Aug 1995 - 628.59375K - gzipped PostScript
This allows high speed serial DS-Links to be interfaced
to buses peripherals and microprocessors. It is particular
suitable to interfacing such devices to interconnects which
deal in packets consisting of data and header information.
This header information may be used to demultiplex packets
from different sources and/or route them through one or more
switches. It has two modes of operations - in the first
(Transparent Mode), with packetization disabled, it provides
simple access to the DS-Link, all data provided to the STC101
is transmitted down the DS-Link. In the second (Packetizing
Mode) it can be used by devices such as processors to use
such things as the ST C104 Asynchronous Packet Switch (APS)
[C104.06.ps.gz below] (datasheet 42 1 470 06). In both
modes it can be used as one of: 16 bit processor i/f, 32 bit
processor i/f or 16 bit processor i/f with token
interfaces. This document includes changes for Revs A and B
silicon.
August 1995. 66 pages. 4 Mbytes (4044143 bytes) uncompressed.
Document number 42 1593 04.
- ST C104 (rev 6) Asynchronous Packet Switch (APS) Preliminary
Datasheet.
Last modified 10:49:00, 11 Aug 1995 - 1.4M - gzipped PostScript
This is a complete, low latency, packet routing switch
on a single chip. It connects 32 high bandwidth serial
communications links to each other via a 32 by 32 way
non-blocking crossbar switch, enabling packets to be routed
from any of its links to any other link. The links operate
concurrently and the transfer of a packet between one pair of
links does not affect the data rate or latency for another
packet passing between a second pair of links. Up to 100
Mbits/s on each link or 19 Mbytes/s on a singe link. Packet
rate processing up to 200 Mpackets/s. Data is transmitted in
packets with headers and uses that to wormhole via interval
labelling routing and Universal Routing to eleminate
hotspots.
Includes errata from previous datasheets and changes for Rev B.
April 1995. 64 pages. 18 Mbytes (18280529 bytes) uncomrpessed.
Document number 42 1 47 0 05.
- Bull Serial Link Technology Strings(TM) BULLIT DataShet v2.0
Last modified 12:25:00, 7 Jul 1995 - 566.34375K - compressed PostScript
Data Sheet v2.0 May 1995 (3.3V version), 54 pages. Bull
Serial Link Technology offers high speed serial
point-to-point links which are compatible with optical links
and can work in the gigabit range. BULLIT has been designed
as technology evaluator chip package.
Author: Roland Marbot, Bull Serial Link Technology, B.P. 68, F1-1D-16,; Tel: +33 1 30 80 74 71; FAX: +33 1 30 80 75 83
- DS SE-100 Link Analyser Product Sheet
Last modified 12:25:00, 2 Jun 1995 - 26.4K - compressed PostScript
An active smart probe for non-invasive monitoring of
IEEE P1355 links as used in SGS T9000 processors and C100
family of communication devices. Requiers one pod of a
HP1650 logic analyser or compatible, capable of 25 MHz state
analysis in order to to analyse one direction of a DS-SE link
at full 100 Mb/s.
Author: Matt Beanland, Borealis DEsign, 12 Avalon Grove, Ringwood 3134,
Australia; Tel: +613 9879 5851; FAX: +613 9854 3178
- CW 1355 C111 DS-link Interface Datasheet
Last modified 08:35:00, 9 Apr 1996 - 16.2K - compressed PostScript
A stand-alone integrated circuit providing an interface
to an IEEE 1355 DS-link implemented as a small 44-pin PLCC.
Author: Paul Walker (paul@walker.demon.co.uk), 4Links for technical help, PO Box 816, Two Mile
Ash, Milton Keynes, MK8 8NS, England; Tel: +44 (0)1908 566253; FAX: +44 (0)1908 566253
- PC PCI bus DS link (IEEE P1355) Interface Cards Datasheet
Last modified 08:33:00, 9 Apr 1996 - 16.7K - gzipped PostScript
Author: Paul Walker (paul@walker.demon.co.uk), 4Links for technical help, PO Box 816, Two Mile
Ash, Milton Keynes, MK8 8NS, England; Tel: +44 (0)1908 566253; FAX: +44 (0)1908 566253
- PCI DS-Link (IEEE 1355) PCB diagram
Last modified 13:37:00, 4 Dec 1995 - 132.05859375K - binary
Author: Paul Walker (paul@walker.demon.co.uk), 4Links for technical help, PO Box 816, Two Mile
Ash, Milton Keynes, MK8 8NS, England; Tel: +44 (0)1908 566253; FAX: +44 (0)1908 566253
- PCI DS-Link (IEEE 1355) PCB advert
Last modified 13:36:00, 4 Dec 1995 - 19.1K - compressed PostScript
Author: Paul Walker (paul@walker.demon.co.uk), 4Links for technical help, PO Box 816, Two Mile
Ash, Milton Keynes, MK8 8NS, England; Tel: +44 (0)1908 566253; FAX: +44 (0)1908 566253
- PCI DS-Link (IEEE 1355) PCB overview
Last modified 13:37:00, 4 Dec 1995 - 1.4K - text
Author: Paul Walker (paul@walker.demon.co.uk), 4Links for technical help, PO Box 816, Two Mile
Ash, Milton Keynes, MK8 8NS, England; Tel: +44 (0)1908 566253; FAX: +44 (0)1908 566253